Avici Systems, Inc.'s upcoming Terabit Switch Router (TSR) is designed to help service providers scale the Internet well into the next decade.
Avici is building what it claims will be a fault-tolerant router that allows users to build fully meshed networks supporting geometric growth. To that end, Avici's TSR, which will ship in the second half of 1998, will leverage hardware-based routing, forwarding, multicasting and quality of service (QoS) to maintain gigabit line rates.
"We're taking what used to be in software and putting it in hardware," said Hank Zannini, Avici founder and vice president of business development. "But we'll differentiate ourselves in building a scalable system. How you build a scalable system is the trick."
Avici is one of several start-up companies building next-generation routers to enable Internet service providers to accommodate exponential growth and deliver value-added services such as QoS and traffic engineering (NW, March 17, 1997, page 1).
Avici builds a scalable system by mirroring the Internet, in which service provider backbones are growing by a factor of five per year. To do this, the TSR line cards each will sport a so-called Direct Connect Fabric (DCF) that serves as a 70G bit/sec router on each line card.
The rack-mountable, dual-shelf TSR chassis will include a passive backplane and house 20 line cards. With DCF, every line card added to a TSR increases switching capacity by 60G bit/sec.
The other 10G bit/sec is reserved for shuttling packets from the input port to the fabric, Zannini said.
Line cards will feature four-port OC-12 Synchronous Optical Network (SONET), and single-port OC-48 and OC-192 SONET links. The TSR will support OC-12 ATM access, but on the backbone side it will support frame relay and PPP data links only, Zannini said.
OC-12 and OC-48 line cards will sport 64M bytes of buffer memory, while the OC-192 cards will have 256M-byte queues. Each card will support 200,000 routes, and new routes can be added via SIMMs. A TSR should be able to handle 60 route updates per second, Zannini said.
Today's Internet has less than 50,000 routes, he said.
The TSR line cards also will feature Application Specific In-tegrated Circuits (ASIC) for packet handling. The ASICs will perform full route table lookup and packet classification in 32 nanosec, and also will handle multicast grouping, scheduling and QoS processing.
For QoS, the TSR will follow the ATM model of delivering constant bit rate, available bit rate and variable bit rate service, Zannini said. Avici will adapt ATM QoS algorithms to work with packets, he said.
In later releases, TSR will feature wavelength division multiplexing (WDM) for transmitting different types of data at distinct optical wavelengths over a single channel. Avici hopes WDM will enable TSR to handle an order-of-magnitude increase in traffic.
Zannini did not disclose pricing for the TSR.
